MC3x063A 1.5 A (Rev. N) Up / Down / Inverter Switching Regulator
Modern active components such as A / D and D / A converters and operational amplifiers generally do not require a negative supply voltage. In particular, operational amplifiers are available with rail-to-rail inputs and outputs, and the input and output voltages can be close enough to ground in most cases.
However, there are still cases where a negative voltage is required, including:
High Performance / High Speed A / D and D / A Converters
Polarization of gallium nitride power transistor
Diode laser polarization in optical modules
Typically, these applications are powered by one or more positive supply rails with buck-boosters and LDOs as charging point controls. In most cases, the network does not deliver the negative voltage, which means it has to be generated by a positive rail.
There are several ways to generate a negative voltage, which depends mainly on the required input voltage, the output voltage and the output current. Examples include: reverse charge pumps; reverse the downsweepers; and CUK converter. Everyone has their advantages and disadvantages.
Inversion of charge pumps
Inverted charge pumps, which may or may not be regulated, are typically used for output currents of approximately 100 mA. They follow a simple conversion principle in two steps and only need three capacitors.
Charge a capacitor from a positive input voltage
Discharge the capacitor to an output capacitor while reversing the connection so that the positive terminal is connected to the negative and vice versa.
This approach produces a negative voltage equal to the input voltage – for example, -5V from a + 5V supply. The TPS60400 family is an example of such a device. The absolute value of the output voltage can only be equal to or less than the input voltage. Therefore, if a lower absolute output voltage is needed, an LDO can be added. The LM27761, which has an integrated LDO, is a suitable device whose output voltage can be adjusted from a 5.5V supply of -1.5V to -5V.
Diagram of a buck-boost inverter converter
Invert Buck-boost converter
For larger output currents, inductive solutions such as the buck-boost inverter are used. These generate a negative output voltage which may be higher or lower than the input voltage and offers an advantage over the load pumps.
In the first step, when S1 is closed, an inductor is charged with current. In the second step S1 is open and S2 is closed. The current in the inductor continues to flow in the same direction and charges the negative output. In general, S2 can be implemented as an active switch, but in most cases is a diode.
The output voltage depends on the duty cycle (D). With:
D = tone / T and tone. Vin = toff. | Vout |
The output voltage is defined as
| Vout | = Wine. [D / (1-D)]
In Fig. 1, the input current flows only when S1 is closed, and the output capacitor is charged only when S2 is closed. As a result, the input and output streams are discontinuous and the maximum induction current is much larger than the average output current. The topology has a low loop bandwidth because delaying the system response sets a limit on the bandwidth of the control loop. If the system requires a higher current, the duty cycle has to be increased, which means a shorter reaction time. This reduces the amount of current that is transferred to the output in this switching cycle so that the output voltage continues to decrease. The control loop therefore requires time until the inductive current in the tone phase rises to the level where in the shorter delay phase a higher current is applied to the output. This effect, called half-level right zero, slows down the response of the control loop somewhat. The loop bandwidth of an inverse buck-boost converter is typically on the order of 10 kHz.
Diagram of an inverter converter
A converter CUK combines a boost converter with a buck converter, wherein the two stages are coupled by a capacitor. This topology requires two inductors or a coupled inductor, but supports a DC input and output current, thus offering advantages for systems requiring low input and output voltage ripple. The bandwidth of the control loop and thus its speed is lower than that of the buck converter.
For applications that require low 1 / f noise at frequencies up to 100kHz, the CUK or buck-boost inverter is not an optimal solution because its control bandwidth is much smaller than 100kHz. One solution to this problem is the inverter converter.
Replacing the input inductor of the CUK converter with a high-side switch results in a new topology; Inverter Converter This consists of a charge pump inverter followed by a buck converter and requires only one inductor. The loop controls the output voltage of the buck converter, and since the load pump stage is associated with the buck converter power stage, it operates on the reverse down cycle of the duty cycle.
In Fig. 2, the voltage on the CP switches between VIN and GND, while the voltage on SW is between -VIN and GND. Since the stage of the charge pump does not improve the input voltage, the voltage at the internal switches is only lower than that of the down converter or CUK. This means that more efficient low-voltage switches can be used. The LC output of the step-down stage filters the output voltage, so that the ripple of the output voltage becomes very small.
The TPS63710 offers several advantages over traditional topologies:
a control bandwidth of about 100 kHz gives a fast transient response
continuous output current for low output voltage ripple
Low gain in the gain stage, the noise level is therefore not increased after the noise filter by a high gain of the gain stage
a low-noise reference system 1 / f
The forbidden band (VBG) voltage is amplified and inverted to produce a negative reference voltage to VREF using an external voltage divider formed by R1 and R2. This reference voltage is set to a voltage slightly lower than the output voltage (in absolute values). This voltage is filtered by an RC filter with an internal resistance of 100 kO and an external capacitor (CCAP) for a low noise of 1 / f to 100 kHz. The gain stage is formed by an inverter associated with a buck converter with a voltage gain of 1 / 0.9.
For most converters, the voltage divider for adjusting the output voltage is on the output side between VOUT and GND, which defines a certain gain of the VOUT / VREF output stage. This increases the noise by 1 / f on the reference voltage. For the TPS63710, the gain is 1 / 0.9, keeping the noise at 1 / f almost at the same level as the reference voltage at CCAP.
The TPS63710 accepts inputs from 3.1 to 14 V with an output voltage between -1 V and -5.5 V. Since the TPS63710 uses a Buck topology, the input voltage must be given in absolute values greater than the output voltage by at least 1 / 0.7.
Fig. 3 shows the scheme of an inverted buck converter optimized for a typical input voltage of 5V and producing a supply of -1.8V up to 1A. The small ceramic capacitors used at the input, at the CP pin and at the output have a low electrical resistance in series and thus provide the least ripple in the output voltage.
The TPS63710 offers the highest efficiency of comparable solutions. The thermal buffer QFN package provides low board thermal resistance. This keeps the junction temperature low even when the device is turned on
The TPS63710 can operate at high ambient temperatures and offers:
A sound of 1 / f ~ 30mVRMS
Energy efficiency over 86%
An output voltage ripple of less than 10 mVpp